Draft. Untested on hardware. Includes untested identification/antenna fitting, USB/IDE setup, both LED sketches, BOOT/RESET recovery, USB restart, external regulated power and battery/charging investigation. Battery work is deferred, not a validated exercise.
Component side, USB above the board, starting at the upper left and upper right. ADC and touch capabilities below are chip capabilities on the corresponding nets; configuration and analog input range still require chip documentation. All signal pins use the chip's logic domain. Physical positions follow the maker's board overview, not the schematic or software aliases. S1S3S4
Maker labels it as thermal pad; not a signal connection in this guide S2
Expansion connector
Fine-pitch add-on connector on component side; not extra edge pads S2S3
Expansion and test nets in schematic v1.1
Connector numbering is schematic numbering, not a photograph orientation. These net names were read from schematic v1.1 and compared with the currently linked schematic; neither proves the connector revision of stock. Do not hand-wire the fine-pitch connector from this table. Camera/microphone nets belong to add-on use and can be occupied on Sense. S3
IO means the corresponding GPIO number. J3 is DF40C-30DP-0.4V(51); contacts 31, 33 and 34 are grounded mounting contacts, but 32 is not connected. VIN is the shared battery/USB feed, not a GPIO. S3S10
These are schematic test-point identities, not physical positions on the board. GPIO38 and GPIO0 are on no test point in these drawings. TP7 and TP8 are USB data lines: never bridge them to enter download mode. Use the BOOT and RESET buttons. S3S10S7
Electrical boundaries
Parameter
Documented value / interpretation
Nominal board inputs
USB 5 V; BAT 3.7 V typical, not a full battery-input range S2
Logic / chip supply
3.3 V nominal; chip recommended supply 3.0–3.6 V S4 (§5.2)
Digital input high range
Minimum 0.75 × VDD; maximum VDD + 0.3 V, DC-characteristics table; not permission to drive a GPIO from 5 V S4 (§5.4)
Digital input low range
−0.3 to 0.25 × VDD, DC-characteristics table S4 (§5.4)
Absolute maximum chip power-pin voltage
−0.3 to 3.6 V, a stress limit rather than an operating target S4 (§5.1)
External-load budget
No validated stock-board budget here; regulator headline is not spare current
Charging current
Plain PDF: 50 mA fast / 3.8 mA trickle; schematics: ICharge = 24000 / 220K = 110 mA. Unresolved for stock S2S3S10
Regulator capacity
Wiki calls 3V3 output 700 mA; both schematics mark Imax 600 mA. Unresolved, and neither is a promised external-load allowance S1S3S10
GPIO source/sink current
Typical 40 mA source at VOH ≥ 2.64 V; 28 mA sink at VOL = 0.495 V; VDD = 3.3 V, PAD_DRIVER = 3, 25 °C. Characterization points, not a safe board-load budget or recommended per-pin draw S4 (Table 5-4)
ADC calibrated effective range
ATTEN0: 0–850 mV; ATTEN1: 0–1100 mV; ATTEN2: 0–1600 mV; ATTEN3: 0–2900 mV. Choose attenuation and calibration; not 5 V tolerance S4 (Table 5-6)
Board operating temperature
Wiki −20 to 65 °C; plain product PDF −40 to 65 °C. Unresolved for stock; chip grade limits do not resolve board limits S1S2
Power-up GPIO glitch
GPIO1–9 (D0–D5, D8–D10) may produce a typical 60 µs low-level glitch at power-up. A motor/relay needs hardware protection from unintended activation S4 (Table 2-2)
Battery complete permitted input range
Not stated by the maker in the plain product PDF; no inferred range S2
BAT voltage ADC
No direct BAT-to-ADC net in older schematic; never connect BAT directly to GPIO for a reading S3S4
Specific hazards: a higher-voltage GPIO signal can damage the chip; reversed battery leads or an unsuitable lithium cell can heat or burn; a shared VBUS rail can back-feed another supply. Unplug before soldering or wiring, keep small loose parts away from mouths, and stop on unexpected heat. USB-only is the pilot activity. Battery assembly/charging needs qualified adult review of the actual revision and cell. S1S2S4
Processor, memory, radio and boot
Topic
Plain board
Processor
ESP32-S3R8, dual-core Xtensa LX7, up to 240 MHz S2
Memory
8 MB PSRAM and 8 MB flash; flash is external in schematic, despite PDF grouping as on-chip memory S2S3
Radio
2.4 GHz Wi-Fi; Bluetooth LE, not Bluetooth Classic S2S4
USB
Native chip USB on GPIO19/20; CDC upload depends on firmware/settings S3S7
Boot messages
Default ROM messages go to UART0 (TX = GPIO43 = D6) and USB Serial/JTAG; configuration/eFuses may suppress them. The D6 schematic path includes a 499 Ω series resistor S4 (§3.3) S3S5
Arduino analog aliases
A0–A5 map to GPIO1–6; A8–A10 map to GPIO7–9. No A6/A7 alias in this variant S5
Normal boot
Flash boot when BOOT is not held; GPIO0 low with GPIO46 low selects joint download mode S4 (§3.1)
Manual recovery, untested
Hold BOOT; press/release RESET; release BOOT; select newly appearing port. Initial flash may need reset afterward S7
Drag-and-drop disk
Not assumed on factory firmware; wiki UF2 procedure installs a separate bootloader S1
Factory sketch
Wiki describes touch-driven LED demo, not verified on stock; our blink overwrites existing sketch S1
More exposed pads; do not reuse this edge drawing S1
Source conflicts and omissions
The combined wiki pin table labels GPIO41/42 as analog, while its warning and the chip datasheet exclude ADC there. They are not plain-board edge pins; the pinned core defines no D11/D12 aliases. S1S4S5
Plus overview says eighteen GPIOs but its pin table lists D0–D19. This guide does not resolve the usable count for Plus. S1
The wiki's current schematic URL says v1.4, its title block says V1.3 and Sense, and its internal filename says V1.5. It is not treated as proof of this plain board's stock revision. S10
Active board-current claims disagree: wiki Wi-Fi/BLE 100/85 mA, plain PDF 220/217 mA. Conditions are not reconciled; neither is a stock measurement or design budget. S1S2
Box contents disagree: wiki says no headers by default, plain PDF lists two seven-pin headers. Do not promise loose headers without inspecting stock. S1S2
User LED colour disagrees: wiki orange, schematic yellow. Its GPIO21 active-low net is consistent; inspect the actual board for colour. S1S3
Charger/regulator conflicts are listed above. Neither software nor document comparison checks which parts arrived in our stock. S1S2S3
Actual flash identification, usable heap, antenna fitted, supply behaviour, LED colour/location and sample markings: not checked. Do not infer a certification, maximum radio range or child suitability from this pilot.
Maker's originals
All read 2026-10-11. These are ordinary links, not embedded documents.